| Dec 2003 – Present. Evaluated a number of CCTV alternatives, ie. Cabled, wireless, IR and a number of capture systems, ie. VCR, HDD, DVR and the internet. Have a strong understanding of the advantages and disadvantages of the various combinations. Installed a few systems already at the homes of friends and relatives and believe myself to be as competent a CCTV Installation Engineer and I was previously a Electronics Engineer and Electronics Electrician. |
| Dec 2002 – Dec 2003. Investigating the potential to add functionality to existing (prospective customer) design. Having self-taught C, am captured using VHDL, a processor using the Altera development kit to configure FPGA as NIOS processor and programming registers using C. |
| Nov 2001 – Dec 2002. Travelled to Japan and embarked on a 2 month intensive language course with a view to securing a position within a Japanese electronics company until a change of heart |
| Sept 2000 – Oct 2001. Electronics Engineer. Philips Semiconductors ITCL, Leuven, Belgium. · Necessary to understand EHCI(Enhanced Host Controller Interface) and USB2.0 spec’s. · CATC USB Analyser used to monitor traffic between host (FPGA and finally ASIC) and numerous peripherals under both Windows98 and Win2K. · Fault-finding on multi FPGA development card as well as de-bugging USB2 design. · During debugging was necessary to monitor traffic on PCI bus with a Logic Analyser ensuring PCI to USB2.0 conversion properly implemented. |
| April 00 - July 00 Electronics Engineer. Sony Devices, The Crescent, Basingstoke. · Involved in verifying multi-interface set-top box chip captured with Verilog. · I2C serial interface exercised to ensure functionality identical to 68000 accesses. · Stimulus generated ensuring operation of MPEG transport stream in parallel/serial mode. |
| Jan 00 - April 00 Electronics Engineer. STMicroelectronics, Azteq West, Bristol. · Developed test-bench for mixed language video chip incorporating SH-5 CPU. · Assembly language prepared and used to send data and instructions to the CPU. · High-level C models used to verify functionality when simulated alongside actual design. |
| Sept 99 - Jan 00 Electronics Engineer. Cogent Defence Systems, Newport, S. Wales · Engaged in testing of X.25 based communications system using protocol analyser. · Checked for corruption of data at various transmission rates. · System subjected to environmental extremes of temperature and voltage. |
| August 98 - Jun 99 Electronics Engineer. Meggitt Avionics, 7 Whittle Avenue, Fareham. · Interpreted requirement specification for secondary aircraft display system. · Functionally verified using Modelsim simulator and synthesised using Exemplar Leonardo. · Netlist ported to Xilinx FPGA and C code generated to test design with TMS320 DSP. |
| March 98 - Jul 98 Electronics Engineer. GEC Marconi Avionics, Edinburgh. · Developed, using VHDL, a testbench to exercise a 120K gate ASIC for a defence application. · Employed Mentor Graphics, Renoir tool to assist in testbench capture. · Utilized ModelSim/QuickHDL simulator to verify functionality. |
| July 97 - Feb. 98 Electronics Engineer.HTEC, 303-305 Portswood Road, Southampton. · Developed a multi-channel display system incorporating the PCI interface. · Involved in component evaluation including availability, particularly high-speed buffers for integrating the design with the PCI bus on the all-in-one plug-in PC card used for control. · VGA graphics chips used to control processing of images. · All-in-one PC card incorporating the PCI bus plugged into multi-channel display motherboard. |
| Jan 97 - May 97 Electronics Engineer. TransEDA. 6 Tollgate, Eastleigh, Southampton. · Established method of interfacing o/p from in-house synthesis tool to Actel P & R s/w. · Ran BIST insertion function within synthesis tool on this FPGA design. · Using VHDL, created a BIST controller from state diagram and ran simulation ensuring signature generated corresponded to that predicted by another synthesis utility. |
| Aug 1996 - Jan 1997 Took time out to study the VHDL programming language using Xilinx, Cypress and Synopsys simulation and synthesis tools installed on my PC at home. Additionally took up a position as a CAD support engineer with LSI Logic, Bracknell for 7 weeks from Nov 1996, developing backing-up scripts with UNIX/csh and GUI’s using Perl. |
| Aug 1995 - July 1996 Electronics Engineer. Philips Semiconductors, Southampton. · Created designs of digital arrays, parameterized analogue elements and soft-blocks. · Schematic capture, analogue cell layout, complete cell placement and routing conducted. · Introduced clock buffering to minimize clock skew prior to placement and routing. |
| April 1995 - July 1995 Electronics Engineer. AB Automotive Electronics, Cardiff, S. Wales. · Xilinx FPGA dev. tools for sch. cap., netlisting, device routing and PROM configuration data. · Produced a 64x16 SRAM using Mentor V8 Design Architect for a microcontroller. |
| Feb. 1993 - Aug 94 Electronics Engineer. NUTS Technologies, Kwun Tong, H. K. · Responsible for the design of video capture products for use with Macintosh computers. · Schematic capture using Viewlogic of digital control and analogue video and audio sections. · Carried out PCB design taking account of both EMC emissions and its susceptability to EMC. |
| Jan 1989 - Dec. 1991 Electronics Engineer.GEC Plessey (2 sites). Lincoln &, Swindon. · Involved with HILO and SPICE simulation, schematic capture and layout of cells and circuits. |
| Sept. 1987 - Aug 1988 Electronics Engineer. Douglas Electronics, Cwmbran, South Wales. |
| 1985 – 1987 Lucas Girling. Electronic Electrician maintaining PLC and CNC machines. |
| 1980 -1985 BSC Panteg. 4 yr apprenticeship. Served a year out of my time on maintainance. |